Open Opportunity

System SW Principal Engineer , Holographic Display

San Jose, CA

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1) Company is working on real Holography, w/ no Headgear. 2) Raised ~$7MM in seed from top venture firms, will be raising Series A soon. Great opportunity for the right person. 3) Team has experience in all aspects of the ecosystem, but sees the linchpin as the display hardware so that is our primary focus at this time. 4) Primary belief of the Company is that shared experiences can only be meaningfully driven with Holography. 5) To make Holography work, many pixels are needed (think Gigapixels) 6) Supporting a multi-Gigapixel Holographic display requires new technology, and we have a large IP portfolio in support of the innovations required 7) One such area of innovation is the mechanisms to drive the correct light emissions to support the visual acuity of the human eye. 8) Ultimately, we envision enabling myriad applications, including the concept of a true Holodeck, similar to what has been visualized in science fiction. 9) Need team members who want to be part of the next step is visual display. Vinod Khosla, Founder, Khosla Ventures: “This is essentially the holy grail of optical display technology, enabling things that seem like science fiction to be possible today. We are thrilled to be in on the ground floor with the team, and look forward to helping evolve this exciting technology.”

POSITION OVERVIEW:

The ideal candidate has many years of experience architecting and implementing SW for distributed systems.  He or she understands how to use CPUs, GPUs, FPGAs, and memory devices to achieve an optimal system performance.   The candidate has a background in writing SW for embedded systems, high-performance real-time graphics, video processing, and is able to balance the performance of CPUs and GPUs.  He or she is familiar with FPGA functionality and design methodology.  The candidate will be setting the standard for company’s system SW design, and will be working daily with a team of software developers, EEs, mechanical engineers, optical engineers, other SW engineers, and experts in light field imaging.

 

JOB DUTIES:

Essential Duties and Responsibilities

  • Generate the SW architecture and lead the implementation for a distributed system with nodes that each run a 3D graphic rendering engine, proprietary codecs, a light field rendering engine which takes into account calibration data and display resolution, and data streaming engines.
  • Determine the requirements for a processor + GPU for driving a display block with a resolution in the range of hundreds of megapixels up to several gigapixels.
  • Generate the SW architecture for a distributed display system driven by multiple servers which includes multiple GPUs, video drivers, processors, and custom FPGAs.  Lead the implementation.
  • Write SW for high-performance real-time 3D graphics applications.
  • Determine a video driver solution in SW to support a single-display resolution of tens of gigapixels.
  • Write SW for sending streaming data from a CPU host to a custom target device using PCIe protocols.
  • Work to integrate system software into 3rd party API’s of gaming engines.
  • Specify the requirements and interconnectivity of a custom FPGA that performs data processing of large data streams for video applications.
  • Implement decoding for proprietary codecs in processors, FPGAs, and GPUs.
  • Other tasks as assigned

 

Other Duties and Responsibilities

  • Work with HW engineers, EE’s, ME’s, optical engineers, light field imaging experts, and other SW engineers to achieve an optimal system design.
  • Evaluate new processors, GPU configurations, and work with vendors from all fields.

 

REQUIREMENTS AND QUALIFICATIONS:

Qualifications

  • At least 5 years of experience in taking a lead role in the system level architecture, hardware implementation, and HW/SW integration of complex video display systems. Experience with design of multiple imaging or display systems is a plus.
  • At least 5 years of experience in taking a lead role in the design and implementation of both system software and embedded software realized in C and C++.
  • Able to specify detailed block diagrams for the interconnection between CPUs, GPUs, PCIe devices, FPGAs, and memory devices running in a distributed system.
  • Experience with balancing CPU and GPU usage.
  • Good understanding of high-performance real-time 3D graphics applications and API’s.
  • Familiar with video synchronization across multiple GPU’s running on multiple systems.
  • Experience in bringing up FW on an embedded processor.
  • Familiarity with working with Display Port video signals, and familiar with video encoding and decoding protocols.
  • Familiar with design and implementation of hardware IP blocks, especially video IP blocks, in an FPGA or an embedded system.
  • Able to implement video drivers for a display with a resolution of many gigapixels.
  • Experience with architecture of imaging systems or display systems.
  • Experience writing drivers in Linux for control of video devices, memory, or other hardware devices.
  • Able to design FW for a target PCIe device communicating with a host
  • Proven experience in working with electrical engineers to bring up the FW for a complex system.
  • Familiarity with integration into a 3rd-party gaming engines such as Unity is desirable.
  • Experience with SW design of a data streaming engine.
  • Comfortable in a fast-paced startup environment

 

Key Competencies

  • High-level system architecture for a distributed system
  • System software architecture and implementation
  • CPUs, GPUs, PCIe, FPGA, and memory device interconnect
  • C and C++
  • FPGA interfaces, architecture
  • GPU and GPU balancing
  • 3D graphics applications and APIs
  • Video synchronization across multiple GPUs
  • Display devices and hardware IP blocks
  • Video interface standards such as Display Port
  • Video codecs
  • Video IP blocks in an FPGA
  • Video drivers for gigapixel resolution displays
  • Linux device drivers
  • Target PCIe FW
  • 3rd party gaming engines
  • Data streaming engines
  • PCIe communication between a target and a host CPU system
  • Video drivers for high-resolution displays